The most important feature of any battery powered system after the obvious functionality is longevity. The limiting component in the life of such systems is almost invariably the battery amp hour rating. Therefore, particularly in implantible medical devices, power conservation measures are extremely important.
It is well known that the power consumption of a digital system is a function of approximately the square of the power supply voltage. Thus, for example, halving the voltage can potentially result in a fourfold increase in battery longevity.
Another important reason for lower voltage operation in implantible devices is a function of recent trends in integrated circuit technologies, namely, reduction in IC line width generally requires a lower power supply. However, it is typical of implantible devices to incorporate a mix of integrated circuit types with different power supply requirements. For example, power DMOS or VMOS devices typically require in excess of 5 V for good operation, while many microprocessor integrated circuits typically require operating voltages in the 3 V range. In the particular implantible device application for which the circuitry of the present invention was developed, two operating voltages are required: a battery terminal voltage Vbatt which varies, depending on battery condition, from 4.5 V to 6.5 V and a regulated 3 V supply from which most of the device's digital logic operates.
It will be obvious to those familiar with battery powered devices which include some high power components that it is desirable to monitor battery terminal voltage under high current load. This is due to the fact that excessive dips in battery terminal voltage may endanger the logical states of the circuitry controlling the high power components. Also, excessive terminal voltage dips may be indicative of an impending battery failure which, in the case of an implantible medical device, triggers immediate replacement of the device.
U.S. Pat. No. 4,599,523 issued to Pless et al on July 8, 1986, discloses a power distribution controller that regulates the load placed on a pacemaker power source. The controller selectively switches the power source between the output capacitor of the pacemaker's output circuitry and the pacemaker's voltage sensitive control circuitry so that the peak power requirement of the output capacitor does not affect the supply voltage of the control circuit. The control circuit is disconnected from the battery whenever the battery is connected across the output capacitor. When the output capacitor is charging, a hold-up capacitor maintains the control circuit supply voltage at or above the minimum required for powering the control circuit. As required, the controller switches to connect the battery to the control circuit and to disconnect the output circuitry.